The CMWA filter topology simulates LC prototype filters by implementing the equations generated by a Wave analysis of the prototype. By taking the load resistances at the terminals into account, the equations describing the individual lossless elements become lossy. Because of the lossy equations, CMWA filters are constructed with lossy integrators (or low-Q biquads) interconnected by signal copiers and summers. Due to the analysis method, prototype structures other than unbalanced LC ladders can be simulated. The simulation of balanced Lattice sections allow for the simulation of filters with superior performance (e.g. very linear phase). The ability to simulate a Lattice section embedded in a ladder structure is unique to the CMWA topology.
The various Current Mode circuits implementing the basic building blocks are described, for blocks simulating either single or dual reactive elements for normal LC ladder branches or four or eight reactive elements for Lattice section simulations. The effects of both gain errors and high frequency limits for the active building blocks are discussed, allowing for selection between the many ideally equivalent simulation topologies. As part of the discussion of high frequency errors, it is shown that for filters based on lossy first order integrators, it is possible to adjust the "shape" of the response curve by tuning only amplifier gain values, a quality unique to the CMWA topology.
An integrated filter chip in CMOS technology provides a proof of concept. The performance characteristics predicted in simulations are confirmed by measurements. Measured characteristics of building blocks fabricated in a fast BiCMOS process are used to predict the performance of high frequency linear-phase filters.